{"id":656475,"date":"2013-05-07T10:42:03","date_gmt":"2013-05-07T14:42:03","guid":{"rendered":"http:\/\/www.datacenterknowledge.com\/?p=97179"},"modified":"2013-05-07T10:42:03","modified_gmt":"2013-05-07T14:42:03","slug":"intel-launches-low-power-silvermont-microarchitecture","status":"publish","type":"post","link":"https:\/\/mereja.media\/index\/656475","title":{"rendered":"Intel Launches Low-Power Silvermont Microarchitecture"},"content":{"rendered":"

Intel<\/strong> (INTC) announced<\/a>\u00a0its microarchitecture named Silvermont, which will support low-power devices from smartphones to servers. The new design is a 22nm Tri-Gate System on Chip (SoC) that delivers a three-fold increase in performance at dramatically lower power than Atom, Intel’s leading low-power processor core.<\/p>\n

“Silvermont is a leap forward and an entirely new technology foundation for the future that will address a broad range of products and market segments,” said Dadi Perlmutter, Intel executive vice president and chief product officer. “Early sampling of our 22nm SoCs, including ‘Bay Trail’ and ‘Avoton’ is already garnering positive feedback from our customers. Going forward, we will accelerate future generations of this low-power microarchitecture on a yearly cadence.”<\/p>\n

Silvermont will serve as the\u00a0foundation for a range of innovative products beginning to come to market later this year, and is targeted at low-power requirements in market segments from smartphones to the data center. It will be manufactured using Intel’s 22nm Tri-Gate SoC\u00a0manufacturing process, which brings significant performance increases and improved energy efficiency.\u00a0A new multi-core and system fabric architecture scales up to eight cores and enables greater performance for higher bandwidth, lower latency and more efficient out-of-order support for a more balanced and responsive system.<\/p>\n

Silvermont also features\u00a0enhanced power management capabilities, including a new intelligent burst technology, low- power C states and a wider dynamic range of operation taking advantage of Intel’s 3-D transistors.<\/p>\n

“Through our design and process technology co-optimization we exceeded our goals for Silvermont,” said Belli Kuttanna, Intel Fellow and chief architect. “By taking advantage of our strengths in microarchitecture development and leading-edge process technology, we delivered a technology package that enables significantly improved performance and power efficiency \u2013 all while delivering higher frequencies. We’re proud of this accomplishment and believe that Silvermont will offer a strong and flexible foundation for a range of new, low-power Intel SoCs.”<\/p>\n

In line with its announced processor roadmap<\/a> Intel has the “Avoton” and “Rangeley” second-generation Atom SoC\u00a0processors ready for launch in the second half of this year. “Avoton” will be used in micro servers, while “Rangeley” is aimed at networking and communications devices. “By taking advantage of both the Silvermont and Haswell microarchitectures, Intel is well positioned to enable great products and experiences across the full spectrum of computing,” Perlmutter said.<\/p>\n","protected":false},"excerpt":{"rendered":"

Intel (INTC) announced\u00a0its microarchitecture named Silvermont, which will support low-power devices from smartphones to servers. The new design is a 22nm Tri-Gate System on Chip (SoC) that delivers a three-fold increase in performance at dramatically lower power than Atom, Intel’s leading low-power processor core. “Silvermont is a leap forward and an entirely new technology foundation […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[7],"tags":[],"class_list":["post-656475","post","type-post","status-publish","format-standard","hentry","category-news"],"_links":{"self":[{"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/posts\/656475","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/comments?post=656475"}],"version-history":[{"count":0,"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/posts\/656475\/revisions"}],"wp:attachment":[{"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/media?parent=656475"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/categories?post=656475"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/mereja.media\/index\/wp-json\/wp\/v2\/tags?post=656475"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}